1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, a static random access memory (SRAM) cell.
2. Description of the Related Art
A prior art SRAM cell is constructed by a flip-flop formed by cross-coupled first and second inverters and transfer transistors connected to first and second nodes of the flip-flop. That is, the first inverter is formed by a first resistance element between a high power supply line and the first node and a first drive MOS transistor between the first node and a ground line. Similarly, the second inverter is formed by a second resistance element between the high power supply line and the second node and a second drive MOS transistor between the second node and the ground line.
Also, the first node is connected directly to a gate electrode of the second drive transistor, so that the second drive transistor is driven directly by the voltage at the first node. Similarly, the second node is connected directly to a gate electrode of the first drive transistor, so that the first drive transistor is driven directly by the voltage at the second node.
In the SRAM cell, the lower the threshold voltage of the transfer transistors, the higher the substantial write voltage. On the other hand, the higher the threshold voltage of the drive transistors, the higher the retention characteristics of the flop-flop against noise. In order to satisfy this requirement, the impurity concentration of a semiconductor substrate (well) of the drive transistors is higher than that of the substrate (well) of the transfer transistors.
The threshold voltage of the drive transistors is higher than the threshold voltage of the transfer transistors.
Additionally, in order to avoid the destruction of data during a write mode, the gate width of the drive transistors is increased while the gate length of the drive transistors is decreased.
In the above-mentioned prior art SRAM cell, however, since the threshold voltage of the drive transistors is set in a range where the threshold voltage greatly depends upon the gate length thereof, the set threshold voltage of the drive transistors greatly fluctuates. This will be explained later in detail.
Note that, in order to suppress the fluctuation of the threshold voltage of the drive transistors, the threshold voltage can be set to be a larger value; however, in this case, the gate length of the transfer transistors has to be larger, which degrades the integration.
It is an object of the present invention to suppress the fluctuation of the threshold voltage of drive transistors in an SRAM cell without degrading the integration.
According to the present invention, in a static random access memory cell including two cross-coupled drive MOS transistors and two transfer MOS transistors connected to the drive MOS transistors, a plurality of gate electrodes of the drive MOS transistors and the transfer MOS transistors are formed over a semiconductor substrate, and a plurality of source/drain impurity diffusion regions of the transistors are formed within the semiconductor substrate. A plurality of pocket regions of the same conductivity type as the semiconductor substrate are formed within the semiconductor substrate. Each of the pocket regions is adjacent to the source of one of the drive MOS transistors and beneath the gate electrode thereof. The impurity concentration of the pocket regions is larger than that of the semiconductor substrate.
Thus, the short channel effect of the drive transistors is suppressed by the pocket regions.